With the increasing speed and data rate of digital data streams, losses in PCB traces have become a significant bottleneck. Enhancing signal integrity by moving signals closer to ASICs through co-packaged optics is crucial.
The evolution of communication speed has shifted from being limited by the medium to being constrained by interpretation. The invention of the telegraph and telephone transformed communication by making it nearly instantaneous, shifting the focus to how quickly messages could be decoded or understood.
Figure 1. Modular server and chassis architectures have traditionally relied on copper backplanes and electrical interconnects to move data between cards, subsystems, and system modules.
While copper backplanes and electrical interconnects were sufficient for interconnects in the past, the demand for higher bandwidth in AI systems and hyperscale architectures has made PCBs less effective. The focus has shifted back to the medium as a critical factor in communication speed.
This challenge is particularly pronounced in scale-up GPU fabrics, hyperscale switching environments, and AI clusters in large data centers. The interconnect is now a central component impacting power consumption, signal integrity, density, and latency in data movement between chips.
Co-packaged optics has emerged in response to these challenges. Rather than a drastic departure from the past, it represents a natural progression towards high-speed connectivity driven by engineering demands that have shaped interconnect designs over the years.
PCBs and backplanes: the original highways
For decades, PCBs and copper backplanes served as the foundation of modular electronic systems. Backplane connectors, copper traces, and electrical signaling facilitated efficient communication between processors and subsystems.
As data rates continue to rise, the limitations of electrical transmission become more apparent. Losses increase with frequency, reflections and crosstalk become more problematic, and PCB design constraints start to dominate the link budget. As a result, more system complexity is dedicated to preserving data integrity rather than moving data.
While copper cabling has been a reliable solution, the challenges of scaling high-speed electrical transmission have prompted innovations like chip-adjacent cabling to improve signal integrity and reach.
Copper scaling dominates the system
Figure 2. As electrical channel loss and jitter increase at higher data rates, the signal eye begins to close, requiring additional equalization, retiming, and conditioning to maintain link integrity.
Higher data rates pose challenges for electrical transmission, with loss and jitter necessitating more complex equalization and encoding techniques. While copper cabling solutions can address these issues, they come with added complexity and power consumption.
As the demand for higher bandwidth density grows, chip-adjacent cabling has emerged as a solution to overcome the limitations of long PCB traces. By routing high-speed signals through cable assemblies adjacent to the silicon, signal integrity and reach can be improved.
Co-packaged copper
Continuing advancements in copper technology have led to innovations like co-packaged copper techniques, which shorten trace lengths and support greater I/O density. However, thermal and mechanical challenges arise as copper is pushed to its limits.
While copper remains crucial for power delivery and short-reach interconnects, the industry recognizes the need for a hybrid approach where copper and optics coexist to meet evolving bandwidth requirements.
When optics first proved its value
The adoption of optics in system design was driven by the limitations of copper in meeting reach and scaling requirements. Optics began appearing closer to the silicon, initially reducing electrical reach in dense systems. As bandwidth demands increased, optics became a more integral part of high-speed communication.
Optics offers scalability advantages over electrical signaling, particularly in terms of reach and bandwidth. The adoption of fiber optics has enabled higher bandwidths and greater scalability compared to traditional copper solutions.
As optics are positioned closer to the source of data, the need for complex signal conditioning diminishes, making co-packaged optics a compelling solution for high-speed connectivity within the package.
What is co-packaged optics?
Figure 4. A co-packaged optics architecture places optical engines adjacent to the ASIC package, allowing fiber connectivity to exit directly from the substrate rather than from a front-panel module.
Co-packaged optics integrates optical conversion functions within the package environment, bringing optical transmit and receive capabilities closer to the ASIC. This architectural shift reduces electrical paths, minimizes signal conditioning overhead, and optimizes silicon and power utilization.
Co-packaged optics represents a shift in where signal conversion occurs, rather than introducing entirely new features.
When does CPO enter the conversation?
Co-packaged optics becomes relevant when traditional copper solutions struggle to scale efficiently, prompting the need for a transition to optics. It is particularly valuable when copper reach limitations and package constraints impede further advancements in bandwidth and power efficiency.
CPO is not about replacing copper entirely but strategically applying optics where distance, density, and power considerations intersect at the chip edge.
Engineering building blocks and open challenges
Implementing co-packaged optics requires close integration of optically enabled chips and photonic tiles near the substrate. External laser sources are essential for optimal performance, and fiber-to-chip connectivity remains a significant challenge that must be addressed for mass deployment.
Who adopts co-packaged optics first?
Hyperscalers and AI infrastructure builders are likely to lead the early adoption of co-packaged optics due to their emphasis on bandwidth density and power efficiency. The technology’s broad applicability becomes evident when optical fiber connectivity is directly available from the chip.
Conclusion: The next step at the chip edge
Co-packaged optics represents the next phase in high-speed connectivity within the package, where optics and copper coexist to meet evolving communication demands. While copper remains vital for certain applications, optics become indispensable where electrical solutions reach their limits.
The future lies in a hybrid approach where both copper and fiber play essential roles based on the specific engineering requirements of the system, advancing high-speed connectivity closer to the silicon.
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